Linus Tech Tips Discussion

 Intel rumored to release Xe3P datacenter GPU with 160GB of LPDDR5X Summary Leaked PCB of the Xe3P datacenter GPU with 20 LPDDR5X sites. Quotes Quote Crescent Island is Intel’s next data-center GPU for AI inference, not a consumer Arc graphics card. Intel confirmed the product in October with Xe3P graphics architecture, 160GB of LPDDR5X memory and support for data types used by inference workloads. The leaked PCB reportedly has 20 LPDDR5X memory sites, with 12 on the front and 8 on the back of the board. If populated with 8GB packages, this would match Intel’s confirmed 160GB capacity. This also shows Intel using LPDDR5X rather than HBM, which should reduce board cost and avoid some supply... My thoughts With the reported configuration this comes out at 640 bit bus with 680 GB/s bandwidth at 160GB Capacity per chip [GB] LPDDR5X CHIPS Max RAM Speed (MT/s) Bus per chip Bus Width [bit] Bandwidth per chip [GB/s] Bandwidth [GB/s] Size [GB] 8 20 8500 32 640 34 680 160 16 20 8500 32 640 34 680 320   Micron does list 128Gb (16GB) LPDDR5X chips that push the capacity up to 320GB   This rumored Intel board, more than a GPU, does resemble a server CPU, that uses much, much faster ram, here a comparison with a 12 channel EPYC server CPU. The intel board uses an equivalent of 10 DIMM channels, with much faster LPDDR5X modules. It's still a lot slower than HBM or GDDR would be, but it's comparable with a mid tier consumer GPU. It's basically a mid way point between a server CPU and a GPU, should have 1/2 to 1/4 the bandwidth of a datacenter accelerator with 1/2 to 1/4 the RAM of a server. Processor Name Socket CPU Cores DIMM SIZE [GB] DDR5 Channels Max RAM Speed (MT/s) MSRP (USD) Bus per DIMM Bus Width [bit] Bandwidth [GB/s] Max Size [GB] AMD EPYC 9654 SP5 (LGA 6096) 96 64 12 4800 11,805 64 768 460.8 768   Compute is a function of many factors. Because of how chips are made, the memory channels have to be on the perimeter, so the chip has to be quite big because it's 20x32 bit wide. Size could be comparable to a server CPU, and that could accomodate lots of compute. But because of Inte